A magnetic memory cell or device stores information by changing electrical resistance of a magnetic tunnel junction (MTJ) element. The MTJ element typically includes a thin insulating tunnel barrier layer sandwiched between a magnetically fixed layer and a magnetically free layer, forming a magnetic tunnel junction. Magnetic orientations of the fixed and free layers may be in a vertical direction, forming a perpendicular MTJ (or pMTJ) element. The pMTJ element could be either in a bottom pinned pMTJ element or a top pinned pMTJ element. The bottom pinned pMTJ element is formed by having the magnetically fixed layer disposed below the magnetically free layer while the top pinned pMTJ element is formed by having the fixed layer disposed above the free layer.
Spin transfer torque (STT) or spin transfer switching, uses spin-aligned (“polarized”) electrons to directly torque the MTJ layers. Specifically, when electrons flowing into a layer have to change spin direction, a torque is developed and is transferred to the nearby layer.
In order to obtain strong perpendicular magnetic anisotropy (PMA), conventional methods have used boron doped cobalt iron (CoFeB) material for the fixed and free layers and a thin oxide tunnel barrier layer. Typically, the boron doped cobalt iron material is annealed at a low temperature to induce strong perpendicular magnetic anisotropy. However, boron may diffuse from the boron doped cobalt iron material and form boron oxide, particularly during post-anneal processing. This may decrease the tunneling magnetoresistance (TMR) ratio and reduce perpendicular magnetic anisotropy, which is reliant on iron-oxygen bonding. Thus, conventional techniques undesirably lead to reduced thermal budget and reduced thermal endurance of the pMTJ stack.
In view of the foregoing, it is desirable to provide MTJ structures, and memory structures including MTJ elements, with improved perpendicular magnetic anisotropy (PMA), enhanced thermal endurance and thermal budget, as well as higher tunneling magnetoresistance (TMR) signal. Furthermore, it is also desirable to provide a method for fabricating such memory structures that is cost effective and compatible with logic processing. Also, it is desirable to provide integrated circuits and methods for fabricating integrated circuits including such structures. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background.